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| Philips Semiconductors Product specification Dual 1-of-4 decoder (3-State) 74F539 DESCRIPTION The 74F539 contains two independent decoders. Each accepts two address (A0 - A1) input signals and decodes them to select one of four mutually exclusive outputs. A Polarity control (P) input determines whether the outputs are active Low (P=H) or active High (P=L). An active-Low Enable (E) is available for data demultiplexing. Data is routed to the selected output in non-inverted or inverted form in the active-Low mode or inverted form in the active-High mode. A High signal on the Output Enable (OEn) input forces the 3-State outputs to the high impedance state. TYPICAL SUPPLY CURRENT (TOTAL) 40mA PIN CONFIGURATION Q2b Q1b Q0b Pb OEb A0a 1 2 3 4 5 6 7 8 9 20 VCC 19 Q3b 18 A1b 17 A0b 16 Eb 15 Ea 14 OEa 13 Pa 12 Q0a 11 Q1a TYPE 74F539 TYPICAL PROPAGATION DELAY 7.5ns A1a Q3a Q2a GND 10 ORDERING INFORMATION DESCRIPTION 20-Pin Plastic DIP 20-Pin Plastic SOL COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C N74F539N N74F539D SF01013 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS A0a - A1a A0b - A1b Ea, Eb OEa, OEb Pa, Pb Q0a-Q3a Q0b-Q3b Decoder A Address inputs Decoder B Address inputs Enable inputs (active Low) Output Enable inputs (active Low) Polarity control inputs Decoder A Data outputs Decoder A Data outputs DESCRIPTION 74F(U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 150/40 150/40 LOAD VALUE HIGH/LOW 20A/0.6mA 20A/0.6mA 20A/0.6mA 20A/0.6mA 20A/0.6mA 3.0mA/24mA 3.0mA/24mA NOTE: One (1.0) FAST Unit Load is defined as: 20A in the High state and 0.6mA in the Low state. LOGIC SYMBOL 6 7 17 18 LOGIC SYMBOL (IEEE/IEC) DMUX A0a A1a A0b A1b 4 5 17 18 16 13 14 6 0 1 0 G 3 N4 0,4 EN 1,4 2,4 3,4 2 1 19 3 13 15 14 4 16 5 Pa Ea OEa Pb Eb OEb Q0a Q1a 12 11 9 8 Q2a Q3a Q0b Q1b Q2b Q3b 7 15 VCC = Pin 20 GND = Pin 10 12 11 9 8 3 2 1 19 SF01014 SF01015 1990 Feb 23 1 853-1274 98905 Philips Semiconductors Product specification Dual 1-of-4 decoder (3-State) 74F539 LOGIC DIAGRAM A1n 7, 18 A0n 6, 17 En 15, 16 Pn 13, 4 OEn VCC = GND = Pin 20 Pin 10 14, 5 12, 3 Q0n 11, 2 Q1n 9, 1 Q2n 8, 19 Q3n SF01016 FUNCTION TABLE INPUTS OEn H L L L L L L L L L H L X Z = = = = En X H L L L L L L L L A1n X X L L H H L L H H A0n X X L H L H L H L H H L L L L H H H L H L L H L H H Q0n Z OUTPUTS Q1n Z Qn=P L L H L H H L H L L L H H H H L Q2n Z Q3n Z OPERATING MODE High Impedance Disable Active High output (P = L) Active Low output (P = H) High voltage level Low voltage level Don't care High impedance "off" state ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to +VCC 48 0 to +70 -65 to +150 UNIT V V mA V mA C C 1990 Feb 23 2 Philips Semiconductors Product specification Dual 1-of-4 decoder (3-State) 74F539 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER LIMITS MIN 4.5 2.0 0.8 -18 -3 24 70 NOM 5.0 MAX 5.5 UNIT V V V mA mA mA C DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL VO OH VOL VIK II IIH IIL IOZH IOZL IOS PARAMETER High-level High level output voltage TEST CONDITIONS1 VCC = MIN, VIL = MAX, VIH = MIN, IOH = MAX VCC = MIN, VIL = MAX, VIH = MIN, IOL = MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX, VO = 2.7V VCC = MAX, VO = 0.5V VCC = MAX ICCH ICC Supply current ICCL VCC = MAX -60 35 40 10%VCC 5%VCC 10%VCC 5%VCC LIMITS MIN 2.4 2.7 3.4 0.35 0.35 -0.73 0.50 0.50 -1.2 100 20 -0.6 50 -50 -150 50 55 TYP2 MAX UNIT V V V V V A A mA A A mA mA mA Low-level output voltage Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Off-state output current High-level voltage applied Off-state output current Low-level voltage applied Short-circuit output current3 ICCZ 40 60 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value under the recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS should be performed last. 1990 Feb 23 3 Philips Semiconductors Product specification Dual 1-of-4 decoder (3-State) 74F539 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25C VCC = +5.0V CL = 50pF, RL = 500 MIN tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay An to Qn Propagation delay En to Qn Propagation delay Pn to Qn Propagation delay Pn to Qn (INV) Output Enable time OEn to Qn Output Disable time OEn to Qn Waveform 1 Waveform 2 Waveform 1 Waveform 2 Waveform 3 Waveform 4 Waveform 3 Waveform 4 4.5 3.0 5.0 3.0 4.0 3.5 6.0 4.0 2.5 5.5 1.5 2.0 TYP 8.5 8.0 7.5 7.0 6.5 5.5 11.5 6.0 4.0 7.0 3.0 4.0 MAX 12.5 12.5 11.0 11.0 9.5 9.0 14.5 9.0 7.5 10.5 6.0 8.0 Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 4.0 3.0 4.5 3.0 3.5 3.0 5.0 4.0 2.0 5.0 1.0 1.5 MAX 13.5 13.0 12.0 11.5 10.5 9.5 15.5 9.5 8.5 11.5 6.5 8.5 ns ns ns ns ns ns ns ns ns ns ns ns UNIT AC WAVEFORMS For all waveforms, VM = 1.5V. An, Pn VM tPLH VM tPHL VM VM En, Pn VM tPHL VM tPLH VM VM Qn Qn SF01017 SF01018 Waveform 1. Propagation Delay for Non-Inverting Outputs Waveform 2. Propagation Delay for Inverting Outputs OEn VM tPZH VM tPHZ VM 0V VOH -0.3V OEn VM tPZL VM tPLZ VM VOL +0.3V Qn Qn SF01019 SF01020 Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 1990 Feb 23 4 Philips Semiconductors Product specification Dual 1-of-4 decoder (3-State) 74F539 TEST CIRCUIT AND WAVEFORM VCC 7.0V VIN PULSE GENERATOR RT D.U.T. VOUT RL NEGATIVE PULSE 90% VM 10% tTHL (tf ) CL RL tTLH (tr ) 90% POSITIVE PULSE 10% tTHL (tf ) AMP (V) 90% VM tw 10% 0V tw VM 10% tTLH (tr ) 0V AMP (V) 90% Test Circuit for 3-State Outputs SWITCH POSITION TEST tPLZ tPZL All other SWITCH closed closed open VM Input Pulse Definition DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns SF00777 1990 Feb 23 5 |
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